First page
Q173: You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
tags: Intel AMD Sun circuit hardware design logic
Q182: An 8bit ADC with parallel output converts input signal into digital numbers. You have to come up with the idea of a circuit, that finds the maxomum of every 10 numbers at the output of the ADC.
tags: Intel AMD nVidia ATI Sun HP hardware hw design circuit logic
Q183: You have two counters to 16, built from negedge D- FF . First circuit is synchronous and second is "ripple" (cascading). Which circuit has a less propagation delay?
tags: Intel NationalSemi AMD Sun hardware hw design circuit logic
Q184: Design a divide-by-3 counter with equal duty cycle ?
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q185: When will you use a latch and a flipflop in a sequential design?
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q186: FIFO Design: We have a fifo which clocks data in at 10mhz and clocks data out at 8mhz. On the input there is only 8 data samples in any order during each 10 clocks. In other words, a 10 input clock window will carry only 8 data samples and the other 2 clocks carry no data (data is scattered in any order). How big does the fifo need to be to avoid data over/under-run.
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q187: We have a circular wheel with half painted black and the other half painted white. There are 2 censors mounted 45 degree apart at the surface of this wheel( not touching the wheel) which give a "1" for black and "0" for white passing under them. Design a circuit to detect which way the wheel is moving. Do not assume any fixed position for start.
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q188: The silicon of a new device has memory leak. When all "0" are written into memory, it reads back all "0" without any problem. When all "1" are written, only 80% of memory cells are read back correctly. What can be possibly the problem with the memory?
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q494: Assume a set-associative cache. Describe how the bits of an address (e.g. 32 but address) are used to check for the presence of that address in the cache.
tags: intel nvidia architecture logic comparch
Q173: You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
tags: Intel AMD Sun circuit hardware design logic
Q182: An 8bit ADC with parallel output converts input signal into digital numbers. You have to come up with the idea of a circuit, that finds the maxomum of every 10 numbers at the output of the ADC.
tags: Intel AMD nVidia ATI Sun HP hardware hw design circuit logic
Q183: You have two counters to 16, built from negedge D- FF . First circuit is synchronous and second is "ripple" (cascading). Which circuit has a less propagation delay?
tags: Intel NationalSemi AMD Sun hardware hw design circuit logic
Q184: Design a divide-by-3 counter with equal duty cycle ?
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q185: When will you use a latch and a flipflop in a sequential design?
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q186: FIFO Design: We have a fifo which clocks data in at 10mhz and clocks data out at 8mhz. On the input there is only 8 data samples in any order during each 10 clocks. In other words, a 10 input clock window will carry only 8 data samples and the other 2 clocks carry no data (data is scattered in any order). How big does the fifo need to be to avoid data over/under-run.
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q187: We have a circular wheel with half painted black and the other half painted white. There are 2 censors mounted 45 degree apart at the surface of this wheel( not touching the wheel) which give a "1" for black and "0" for white passing under them. Design a circuit to detect which way the wheel is moving. Do not assume any fixed position for start.
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q188: The silicon of a new device has memory leak. When all "0" are written into memory, it reads back all "0" without any problem. When all "1" are written, only 80% of memory cells are read back correctly. What can be possibly the problem with the memory?
tags: Intel AMD nVidia ATI Sun HP NationalSemi hardware hw design circuit logic
Q494: Assume a set-associative cache. Describe how the bits of an address (e.g. 32 but address) are used to check for the presence of that address in the cache.
tags: intel nvidia architecture logic comparch
